1. Floyd R. W. Algorithm 97: Shortest path. Communications of the ACM, 1962, vol. 5, no. 6, p. 345.
2. Madkour A, Aref W. G., Rehman F. U., Rahman M. A., Basalamah S. A. Survey of Shortest-Path Algorithms, 2017, 26 р. Available at: https://arxiv.org/abs/1705.02044 (accessed 23.11.2022).
3. Anu P., Kumar M. G. Finding all-pairs shortest path for a large-scale transportation network using parallel Floyd-Warshall and parallel Dijkstra algorithms. Journal of Computing in Civil Engineering, 2013, vol. 27, no. 3, pp. 263–273.
4. Prihozhy A. A., Mattavelli M., Mlynek D. Evaluation of parallelization potential for efficient multimedia implementations: dynamic evaluation of algorithm critical path. IEEE Transactions on Circuits and Systems for Video Technology, vol. 15, no. 5, 2005, pp. 593–608.
5. Singh A., Mishra P. K. Performance analysis of Floyd Warshall algorithm vs rectangular algorithm. International Journal of Computer Applications, 2014, vol. 107, no. 16, pp. 23–27.
6. Venkataraman G. A., Sahni S., Mukhopadhyaya S. Blocked all-pairs shortest paths algorithm. Journal of Experimental Algorithmics (JEA), 2003, vol. 8, pp. 857–874.
7. Park J., Penner M., Prasanna V. K. Optimizing graph algorithms for improved cache performance. IEEE Transactions on Parallel and Distributed Systems, 2004, vol. 15, no. 9, pp. 769–782.
8. Madduri K., Bader D. A., Berry J. W., Crobak J. R. An experimental study of a parallel shortest path algorithm for solving large-scale graph instances. Proceedings of the Nine Workshop on Algorithm Engineering and Experiments, ALENEX 2007, New Orleans, Louisiana, USA, 6 January 2007. New Orleans, 2007, pp. 23–35.
9. Albalwi E., Thulasiraman P., Thulasiram R. Task level parallelization of all pair shortest path algorithm in OpenMP 3.0. Advances in Computer Science and Engineering (CSE 2013). Los Angeles, Atlantis Press, 2013, pp. 109–112.
10. Tang P. Rapid development of parallel blocked all-pairs shortest paths code for multi-core computers. IEEE SOUTHEASTCON 2014, Lexington, KY, USA, 13–16 March 2014. Lexington, 2014, pp. 1–7.
11. Prihozhy A. A., Karasik O. N. Heterogeneous blocked all-pairs shortest paths algorithm. Sistemnyj analiz i prikladnaja informatika [System Analysis and Applied Information Science], 2017, no. 3, pp. 68–75 (In Russ.). https://doi.org/10.21122/2309-4923-2017-3-68-75
12. Karasik O. N., Prihozhy A. A. Threaded block-parallel algorithm for finding the shortest paths on graph. Doklady Belorusskogo gosudarstvennogo universiteta informatiki i radioèlektroniki [Reports of the Belarusian State University of Informatics and Radioelectronics], 2018, no. 2, pp. 77–84 (In Russ.).
13. Karasik O. N., Prihozhy A. A. Tuning block-parallel all-pairs shortest path algorithm for efficient multi-core implementation. System Analysis and Applied Information Science, 2022, no. 3, pp. 68–75. https://doi.org/10.21122/2309-4923-2022-3-57-65
14. Prihozhy A. A. Simulation of direct mapped, k-way and fully associative cache on all pairs shortest paths algorithms. System Analysis and Applied Information Science, 2019, no. 4, pp. 10–18. https://doi.org/10.21122/2309-4923-2019-4-10-18
15. Prihozhy A. A. Optimization of data allocation in hierarchical memory for blocked shortest paths algorithms. System Analysis and Applied Information Science, 2021, no. 3, pp. 40–50. https://doi.org/10.21122/2309-4923-2021-3-40-50
16. Likhoded N. A., Sipeyko D. S. Generalized blocked Floyd – Warshall algorithm. Journal of the Belarusian State University. Mathematics and Informatics, 2019, no. 3, pp. 84– 92 (In Russ).
17. Kahn G. The semantics of a simple language for parallel programming. Information Processing 74: Proceedings of the IFIP Congress 74, Stockholm, Sweden, 5–10 August 1974. Stockholm, 1974, pp. 471–475.
18. Lee E. A., Messerschmitt D. G. Synchronous dataflow. Proceedings of the IEEE, September 1987, vol. 75, no. 9, pp. 1235–1245.
19. Prihozhy A., Mlynek D., Solomennik M., Mattavelli M. Techniques for optimization of net algorithms. 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), Warsaw, Poland, 22–25 September 2002. Warsaw, 2002, pp. 211–216.
20. Eker J., Janneck J. W. Cal Language Report : Technical Report UCB/ERL M03/48. University of California at Berkeley, December 2003, 107 p.
21. Bhattacharyya S. S., Brebner G., Janneck J. W., Eker J., Platen C., …, Raulet M. OpenDF – a dataflow toolset for reconfigurable hardware and multicore systems. First Swedish Workshop on Multi-Core Computing, MCC, Ronneby, Sweden, 27–28 November 2008. Ronneby, 2008, рр. 43–49.
22. Murthy P. K., Lee E. A. Multidimensional synchronous dataflow. IEEE Transactions on Signal Processing, 2002, vol. 50, no. 8, pp. 2064–2079.
23. Bhattacharya B., Bhattacharyya S. S. Parameterized dataflow modeling for DSP systems. IEEE Transactions on Signal Processing, 2001, vol. 49, no. 10, pp. 2408–2421.
24. Bebelis V., Fradet P., Girault A., Lavigueur B. BPDF: Boolean Parametric Data Flow : Research Report RR-8333. INRIA, 2013, 21 p.
25. Rahman A.-H. Ab, Prihozhy A., Mattavelli M. Pipeline synthesis and optimization of FPGA-based video processing applications with CAL. EURASIP Journal on Image and Video Processing, vol. 2011:19, pp. 1–28. https://doi.org/10.1186/16875281-2011-19
26. Prihozhy A., Casale-Brunet S., Bezati E., Mattavelli M. Efficient dynamic optimization heuristics for dataflow pipelines. 2018 IEEE International Workshop on Signal Processing Systems, SiPS 2018, Cape Town, South Africa, 21–24 October 2018. Cape Town, 2018, pp. 337–342.
27. Prihozhy A. A., Casale-Brunet S., Bezati E., Mattavelli M. Pipeline synthesis and optimization from branched feedback dataflow programs. Journal of Signal Processing Systems, Springer Nature, 2020, vol. 92, pp. 1091–1099. https://doi.org/10.1007/s11265-020-01568-5